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Through theoretical analysis, we demonstrate that a capacitor modeled as a parallel combination of a resistance (R) and a capacitance (C), with a current–voltage characteristic I = I (E), exhibits a volatile negative capacitance effect when the condition I′(E) > I (E) is satisfied. In contrast, ordinary dielectric capacitors satisfy I′(E) < I (E), resulting in the accumulation of free charge on the plates and a positive capacitance. When the capacitive component becomes negligible and only resistance remains, I′(E) = I (E) and which corresponds to Ohm’s law. We fabricated two-electrode structures with nanometer-scale spacing using multi-walled carbon nanotubes (MWCNTs) and Si crystals as electrode materials. Experimental measurements confirmed the presence of negative capacitance, in agreement with theoretical predictions. Unlike ferroelectric-origin negative capacitance, this mechanism arises from the I − V characteristics between electrodes. We further show that this negative capacitance can be equivalently represented as an inductance in a circuit, enabling its use as a two-dimensional inductor without electromagnetic interaction. Circuit-level integration and broader applications are anticipated.